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max16907 36v, 2.2mhz step-down converter with low operating current general description the max16907 is a 3a, current-mode, step-down con - verter with an integrated high-side switch. the device is designed to operate with input voltages from 3.5v to 36v while using only 30 f a quiescent current at no load. the switching frequency is adjustable from 1mhz to 2.2mhz by an external resistor and can be synchronized to an external clock. the output voltage is pin selectable to be 5v fixed or adjustable from 1v to 10v. the wide input voltage range along with its ability to operate at high duty cycle during undervoltage transients make the device ideal for automotive and industrial applications. the device operates in skip mode for reduced current consumption in light-load applications. protection fea - tures include overcurrent limit, overvoltage, and thermal shutdown with automatic recovery. the device also features a power-good monitor to ease power-supply sequencing. the device operates over the -40 n c to +125 n c automo - tive temperature range, and is available in 16-pin tssop and tqfn (5mm x 5mm) packages with exposed pads. applications automotiveindustrial/military high-voltage input dc-dc converter point-of-load applications features s wide 3.5v to 36v input voltage range s 42v input transients tolerance s high duty cycle during undervoltage transients s 5v fixed or 1v to 10v adjustable output voltage s integrated 3a internal high-side (70m i typ) switch s fast load-transient response and current-mode architecture s adjustable switching frequency (1mhz to 2.2mhz) s frequency synchronization input s 30a standby mode operating current s 5a typical shutdown current s spread spectrum (optional) s overvoltage, undervoltage, overtemperature, and short-circuit protections typical application circuit 19-5779; rev 2; 4/13 ordering information appears at end of data sheet. for related parts and recommended products to use with this part, refer to: www.maximintegrated.com/max16907.related evaluation kit available d1 c out 22f c in2 4.7f r comp 20k i r pgood 10k i r fosc 12k i l1 2.2h v out 5v at 3a c bst 0.1f lx bst v out v bias out v bat fb v bias pgood fosc c bias 1f c comp2 12pf bias c comp1 1000pf comp fsync en supsw sup gnd c in1 47f power good max16907 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrated?s website at www.maximintegrated.com. downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 2 maxim integrated sup, supsw, lx, en to gnd ............................... -0.3v to +42v sup to supsw ..................................................... -0.3v to +0.3v bst to gnd ........................................................... -0.3v to +47v bst to lx ............................................................... -0.3v to +6v out to gnd .......................................................... -0.3v to +12v fosc, comp, bias, fsync, i.c., pgood , fb to gnd ............................................................ -0.3v to +6v lx continuous rms current ................................................... 4a output short-circuit duration .................................... continuous continuous power dissipation (t a = +70 n c) tssop (derate 26.1mw/ o c above +70 n c) .......... 2088.8mw* tqfn (derate 28.6mw/ o c above +70 n c) ............ 2285.7mw* operating temperature range ........................ -40 n c to +125 n c junction temperature ..................................................... +150 n c storage temperature range ............................ -65 n c to +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ..................................... +260 o c tssop junction-to-ambient thermal resistance ( b ja ) ....... 38.3 n c/w junction-to-case thermal resistance ( b jc ) ................. 3 n c/w tqfn junction-to-ambient thermal resistance ( b ja ) .......... 35 n c/w junction-to-case thermal resistance( b jc ) ............... 2.7 n c/w absolute maximum ratings note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial . stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. package thermal characteristics (note 1) electrical characteristics (v sup = v supsw = 14v, v en = 14v, c bias = 1 f f, r fosc = 12k i , t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) * as per the jedec 51 standard (multilayer board). parameter symbol conditions min typ max units supply voltage range v sup , v supsw 3.5 36 v load-dump event supply voltage v sup_ld t ld < 1s 42 v supply current i sup i load = 1.5a 3.5 ma i sup_standby standby mode, no load, v out = 5v 30 60 f a standby mode, no load, v out = 5v, t a = +25c 30 45 shutdown supply current i shdn v en = 0v 5 12 f a bias regulator voltage v bias v sup = v supsw = 6v to 36v 4.7 5 5.3 v bias undervoltage lockout v uvbias v bias rising 2.9 3.1 3.3 v bias undervoltage-lockout hysteresis 400 mv thermal-shutdown threshold +175 n c thermal-shutdown threshold hysteresis 15 n c * the parametric values (min, typ, max limits) shown in the electrical characteristics table supersede values quoted elsewhere in this data sheet. downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 3 maxim integrated electrical characteristics* (continued)(v sup = v supsw = 14v, v en = 14v, c bias = 1 f f, r fosc = 12k i , t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) parameter symbol conditions min typ max units output voltage (out)output voltage v out v fb = v bias, normal operation 4.925 5 5.075 v skip-mode output voltage v out_skip no load, v fb = v bias 4.925 5 5.15 v adjustable output voltage range v out_adj fb connected to external resistive divider 1 10 v load regulation v fb = v bias , 30ma < i load < 3a 0.5 % line regulation v fb = v bias , 6v < v supsw < 36v 0.02 %/v bst input current i bst_on high-side on, v bst - v lx = 5v 1.5 2.5 ma lx current limit i lx (note 2) 3.4 4.1 6 a skip-mode threshold i skip_th 300 ma spread spectrum spread spectrum enabled 6 % power-switch on-resistance r on r on measured between supsw and lx, i lx = 1a, v bias = 5v 70 150 m i high-side switch leakage current v sup = 36v, v lx = 0v, t a = +25c 1 f a transconductance amplifier (comp)fb input current i fb 10 na fb regulation voltage v fb fb connected to an external resistive divider, 0c < t a < +125c 0.99 1.0 1.01 v -40c < t a < +125c 0.985 1.0 1.015 fb line regulation d v line 6v < v sup < 36v 0.02 %/v transconductance (from fb to comp) g m v fb = 1v, v bias = 5v (note 2) 900 f s minimum on-time t on_min 80 ns maximum duty cycle dc max f sw = 2.2mhz 98 % f sw = 1mhz 99 oscillator frequencyoscillator frequency r fosc = 12k i 2.05 2.20 2.35 mhz external clock input (fsync)fsync input current t a = +25c 1 f a external input clock acquisition time t fsync 1 cycles external input clock frequency (note 2) f osc + 10% hz * the parametric values (min, typ, max limits) shown in the electrical characteristics table supersede values quoted elsewhere in this data sheet. downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 4 maxim integrated electrical characteristics* (continued)(v sup = v supsw = 14v, v en = 14v, c bias = 1 f f, r fosc = 12k i , t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) note 2: guaranteed by design; not production tested. parameter symbol conditions min typ max units external input clock high threshold v fsync_hi v fsync rising 1.4 v external input clock low threshold v fsync_lo v fsync falling 0.4 v soft-start time t ss 8.5 ms enable input (en)enable input-high threshold v en_hi 2 v enable input-low threshold v en_lo 0.9 v enable threshold voltage hysteresis v en,hys 0.2 v enable input current i en t a = +25c 1 f a resetoutput overvoltage trip threshold v out_ov 105 110 115 %v fb pgood switching level v th_rising v fb rising, v pgood = high 93 95 97 %v fb v th_falling v fb falling, v pgood = low 90 92.5 95 pgood debounce 10 35 60 f s pgood output low voltage i sink = 5ma 0.4 v pgood leakage current v out in regulation, t a = +25 n c 1 f a * the parametric values (min, typ, max limits) shown in the electrical characteristics table supersede values quoted elsewhere in this data sheet. downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 5 maxim integrated typical operating characteristics (v sup = v supsw = v en = 14v, v out = 5v, fb connected to v out , l1 = 2.2h (wurth 744311220), d1 = d360b-13-f (diodes, inc.), t a = +25 n c, unless otherwise noted.) switching frequency vs. load current(5v/2.2mhz) max16907 toc07 load current (a) 2.5 2.0 1.5 1.0 0.5 0 3.0 switching frequency (mhz) 0.5 1.0 1.5 2.0 2.5 3.0 0 v in = 14v i load = 1.5a switching frequency vs. r fosc max16907 toc06 r fosc (k i ) switching frequency (mhz) 21 18 15 0.5 1.0 1.5 2.0 2.5 3.0 0 12 24 v in = 14v i load = 1.5a efficiency vs. load current v in = 14v max16907 toc05 load current (a) efficiency (%) 2.7 2.4 1.8 2.1 0.9 1.2 1.5 0.6 0.3 3.0 10 20 30 40 50 60 70 80 90 100 0 d1: b360b-13-f from diodesl1: wurth 744311220 3.3v 5v 8v 0.01 0.001 0.0001 0 0.1 efficiency vs. load current v in = 14v max16907 toc04 load current (a) efficiency (%) 10 20 30 40 50 60 70 80 90 100 0 8v 3.3v 5v d1: b360b-13-f from diodesl1: wurth 744311220 supply current vs. supply voltage (5v/2.2mhz) max16907 toc03 supply voltage (v) supply current (a) 33.5 30.0 23.0 26.5 12.5 16.0 19.5 9.0 10 20 30 40 50 60 70 80 90 100 110 120 0 5.5 i sup + i supsw skip mode startup behavior (5v/2.2mhz) max16907 toc02 v in v out v pgood 5v/div10v/div 2v/div 0v0v 0v 2ms/div sup shorted to supsw pwm mode startup behavior (5v/2.2mhz) max16907 toc01 v in v out i load v pgood 5v/div10v/div 2v/div2a/div 0v0v 0a 0v 2ms/div sup shorted to supsw downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 6 maxim integrated typical operating characteristics (continued) (v sup = v supsw = v en = 14v, v out = 5v, fb connected to v out , l1 = 2.2h (wurth 744311220), d1 = d360b-13-f (diodes, inc.), t a = +25 n c, unless otherwise noted.) output response to slow input ramp (iload = 3a) max16907 toc13 v in v out v lx i load 5v/div 10v/div5a/div 10v/div0a 0v 0v 0v 4s/div 5v/2.2mhzsup shorted to supsw load dump test (5v/2.2mhz) max16907 toc12 v in v out 10v/div5v/div 0v 0v 100ms/div sup shorted to supsw undervoltage pulse (5v/2.2mhz) max16907 toc11 v in v out v lx v bias 5v/div5v/div 5v/div20v/div 0v 0v 0v0v 10ms/div resistive load = 1.6 i fsync transition from internal to external frequency (3.3v/2.2mhz configuration) max16907 toc10 v lx v fsync 5v/div2v/div 0v 0v 200ns/div f fsync = 2.475mhz load-transient response (skip mode) max16907 toc09 v out ac-coupled i load 50mv/div100ma/div 0 100s/div 5v/2.2mhz load-transient response (5v/2.2mhz) max16907 toc08 v out ac-coupled i load 200mv/div1a/div 0a 100s/div downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 7 maxim integrated typical operating characteristics (continued) (v sup = v supsw = v en = 14v, v out = 5v, fb connected to v out , l1 = 2.2h (wurth 744311220), d1 = d360b-13-f (diodes, inc.), t a = +25 n c, unless otherwise noted.) 18 16 12 14 4 6 8 10 2 02 0 bias load regulation (5v/2.2mhz) max16907 toc19 i bias (ma) v bias (v) 4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10 4.90 t a = +125c t a = -40c t a = +25c v out line regulation (5v/2.2mhz) max16907 toc18 supply voltage (v) v out (v) 30 24 18 12 6 4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10 4.90 03 6 i load = 0a v out line regulation (5v/2.2mhz) max16907 toc17 supply voltage (v) v out (v) 16 14 12 10 8 4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10 4.90 61 8 i load = 3a v out vs. temperature (5v/2.2mhz) v out (v) 4.92 4.94 4.96 4.98 5.02 5.04 5.06 5.08 5.104.90 max16907 toc16 5.00 temperature (c) 110 95 80 65 50 35 205 -10 -25 -40 125 i load = 3a i load = 0a v in = 14v v out load regulation (5v/2.2mhz) max16907 toc15 i load (a) v out (v) 1.0 0.8 0.6 0.4 0.2 4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10 4.90 0 1.2 v in = 14v max16907 toc14 v out i lx v pgood 5v/div 2v/div10a/div 0a 0v 0v 10ms/div short circuit to ground test (5v/2.2mhz) downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 8 maxim integrated typical operating characteristics (continued) (v sup = v supsw = v en = 14v, v out = 5v, fb connected to v out , l1 = 2.2h (wurth 744311220), d1 = d360b-13-f (diodes, inc.), t a = +25 n c, unless otherwise noted.) max16907 toc23 v out v in v pgood v lx 10v/div 5v/div 10v/div5v/div 0v 0v 0v0v 10ms/div line transient test (5v/2.2mhz) sup shorted to supswresistive load = 1.6 i max16907 toc22 v out v in v pgood v lx 5v/div 5v/div 10v/div5v/div 0v 0v 0v0v 10ms/div dips and drop test (5v/2.2mhz) resistive load = 1.6 i i shd n vs. temperature i shdn (a) 4.2 4.4 4.6 4.8 5.2 5.4 5.6 5.8 6.04.0 max16907 toc21 5.0 temperature (c) 110 95 80 65 50 35 205 -10 -25 -40 125 v en = 0v v in = 14v i shdn vs. supply voltage max16907 toc20 supply voltage (v) i shdn (a) 38 31 24 17 10 2 4 6 8 10 12 14 16 18 20 0 34 5 v en = 0v t a = -40c t a = +25c t a = +125c downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 9 maxim integrated pin configurations pin descriptions pin name function tssop tqfn 1 15 fsync synchronization input. the device synchronizes to an external signal applied to fsync. the external clock frequency must be 10% greater than the internal clock frequency for proper operation. connect fsync to gnd if the internal clock is used. 2 16 fosc resistor-programmable switching-frequency setting control input. connect a resistor from fosc to gnd to set the switching frequency. 3 1 pgood open-drain, active-low output. pgood asserts when v out is below the 92.5% regula - tion point. pgood deasserts when v out is above the 95% regulation point. 4 2 out switch regulator output. out also provides power to the internal circuitry when the out - put voltage of the converter is set between 3v and 5v during standby mode. 5 3 fb feedback input. connect an external resistive divider from out to fb and gnd to set the output voltage. connect to bias to set the output voltage to 5v. 6 4 comp error-amplifier output. connect an rc network from comp to gnd for stable operation. see the compensation network section for more details. 7 5 bias linear regulator output. bias powers up the internal circuitry. bypass with a 1 f f capacitor to ground. 8 6 gnd ground 9 7 bst high-side driver supply. connect a 0.1 f f capacitor between lx and bst for proper operation. + + tssop 13 4 supsw out 14 3 supsw pgood 15 2 en fosc 16 1 top view i.c. fsync 10 7 sup bias 11 6 lx comp 98 bst gnd 12 5 lx fb ep ep max16907 max16907 1516 14 13 65 7 out comp 8 pgood supswlx supsw 12 i.c. 4 12 11 9 fsync fosc supbst gnd bias fb lx 3 10 en tqfn (5mm 5mm) top view downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 10 maxim integrated pin descriptions (continued) internal block diagram pin name function tssop tqfn 10 8 sup voltage supply input. sup powers up the internal linear regulator. connect a minimum 4.7 f f capacitor to ground. 11, 12 9, 10 lx inductor switching node. connect a schottky diode between lx and gnd. 13, 14 11, 12 supsw internal high-side switch-supply input. supsw provides power to the internal switch. connect a 0.1 f f decoupling capacitor and a 4.7 f f ceramic capacitor to ground. 15 13 en sup voltage-compatible enable input. drive en low to disable the device. drive en high to enable the device. 16 14 i.c. internally connected. connect to ground for proper operation. ? ? ep exposed pad. connect ep to a large-area contiguous copper ground plane for effective power dissipation. do not use as the only ic ground connection. ep must be connected to gnd. max16907 fbsw out comp pgood en fb soft- start slope comp fbok eamp hsd aon logic cs ref hvldo switch- over osc pwm sup bias bst supswlx fsync fosc downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 11 maxim integrated detailed description the max16907 is a constant-frequency, current-mode, automotive buck converter with an integrated high-side switch. the device operates with input voltages from 3.5v to 36v and tolerates input transients up to 42v. during undervoltage events, such as cold-crank condi - tions, the internal pass device maintains 98% duty cycle.the switching frequency is resistor programmable from 1mhz to 2.2mhz to allow optimization for efficiency, noise, and board space. a synchronization input fsync allows the device to synchronize to an external clock frequency. during light-load conditions, the device enters skip mode for high efficiency. the 5v fixed output voltage eliminates the need for external resistors and reduces the supply current to 30 f a. see the internal block diagram for more information. wide input voltage range (3.5v to 36v) the device includes two separate supply inputs, sup and supsw, specified for a wide 3.5v to 36v input voltage range. v sup provides power to the device and v supsw provides power to the internal switch. when the device is operating with a 3.5v input supply, certain conditions such as cold crank can cause the voltage at supsw to drop below the programmed output voltage. as such, the device operates in a high duty-cycle mode to maintain output regulation. linear regulator output (bias) the device includes a 5v linear regulator, bias, that provides power to the internal circuitry. connect a 1 f f ceramic capacitor from bias to gnd. external clock input (fsync) the device synchronizes to an external clock signal applied at fsync. the signal at fsync must have a 10% higher frequency than the internal clock frequency for proper synchronization. soft-start the device includes an 8.5ms fixed soft-start time for up to 500 f f capacitive load with a 3a resistive load. minimum on-time the device features a 80ns minimum on-time that ensures proper operation at 2.2mhz switching frequency and high differential voltage between the input and the output. this feature is extremely beneficial in automotive applications where the board space is limited and the converter needs to maintain a well-regulated output voltage using an input voltage that varies from 9v to 18v. additionally, the device incorporates an innovative design for fast-loop response that further ensures good output-voltage regulation during transients. system enable (en) an enable-control input (en) activates the device from its low-power shutdown mode. en is compatible with inputs from automotive battery level down to 3.3v. the high- voltage compatibility allows en to be connected to sup, key/kl30, or the inh pin of a can transceiver. en turns on the internal regulator. once v bias is above the internal lockout threshold, v uvl = 3.1v (typ), the con - troller activates and the output voltage ramps up within 8.5ms. a logic-low at en shuts down the device. during shut - down, the internal linear regulator and gate drivers turn off. shutdown is the lowest power state and reduces the quiescent current to 5 f a (typ). drive en high to bring the device out of shutdown. overvoltage protection the device includes overvoltage protection circuitry that protects the device when there is an overvoltage condi - tion at the output. if the output voltage increases by more than 110% of its set voltage, the device stops switching. the device resumes regulation once the overvoltage condition is removed. fast load-transient response current-mode buck converters include an integrator architecture and a load-line architecture. the integra - tor architecture has large loop gain but slow transient response. the load-line architecture has fast transient response but low loop gain. the device features an inte - grator architecture with innovative designs to improve transient response. thus, the device delivers high output- voltage accuracy, plus the output can recover quickly from a transient overshoot, which could damage other on-board components during load transients. overload protection the overload protection circuitry is triggered when the device is in current limit and v out is below the reset threshold. under these conditions the device turns the high-side fet off for 16ms and re-enters soft-start. if the overload condition is still present, the device repeats the cycle. downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 12 maxim integrated skip mode/standby mode during light-load operation, i inductor p 185ma, the device enters skip mode operation. skip mode turns off the majority of circuitry and allows the output to drop below regulation voltage before the switch is turned on again. the lower the load current, the longer it takes for the regulator to initiate a new cycle. because the con - verter skips unnecessary cycles and turns off the majority of circuitry, the converter efficiency increases. when the high-side fet stops switching for more than 50 f s, most of the internal circuitry, including ldo, draws power from v out (for v out = 3v to 5.5v), allowing current consump - tion from the battery to drop to only 30 f a. spread spectrum the ic has an internal spread-spectrum option to optimize emi performance. this is factory set and the s-version of the ic should be ordered. for spread-spectrum-enabled ics, the operating frequency is varied 6% up from the 2.2mhz base frequency. the modulation signal is a tri - angular wave with a period of 400 s. therefore, fosc ramps up 6% in 200 s and then ramps down 6% and back to 2.2mhz in 200 s. the cycle repeats. the 400 s modulation period is fixed for other fosc freqnecy. the internal spread spectrum is disabled if the ic is synced to an external clock. however, the ic accepts an external spread-spectrum clock. overtemperature protection thermal-overload protection limits the total power dissipa - tion in the device. when the junction temperature exceeds +175 n c (typ), an internal thermal sensor shuts down the internal bias regulator and the step-down converter, allowing the ic to cool. the thermal sensor turns on the ic again after the junction temperature cools by 15 n c. applications information setting the output voltage connect fb to bias for a fixed 5v output voltage. to set the output to other voltages between 1v and 10v, con - nect a resistive divider from output (out) to fb to gnd ( figure 1 ). calculate r fb1 (out to fb resistor) with the following equation: out fb1 fb2 fb v rr 1 v ?? ?? = ? ?? ?? ?? ?? ?? where v fb = 1v (see the electrical characteristics table). internal oscillator the switching frequency, f sw , is set by a resistor (r fosc ) connected from fosc to gnd. see figure 2 to select the correct r fosc value for the desired switching frequency. for example, a 2.2mhz switching frequency is set with r fosc = 12k i . higher frequencies allow designs with lower inductor values and less output capacitance. consequently, peak currents and i 2 r losses are lower at higher switching frequencies, but core losses, gate charge currents, and switching losses increase. inductor selection three key inductor parameters must be specified for operation with the device: inductance value (l), inductor saturation current (i sat ), and dc resistance (r dcr ). to select inductance value, the ratio of inductor peak-to-peak ac current to dc average current (lir) must be selected first. a good compromise between size and loss is a 30% peak-to-peak ripple current to average-current ratio (lir = 0.3). the switching frequency, input voltage, figure 1. adjustable output-voltage setting figure 2. switching frequency vs. r fosc r fb2 r fb1 fb max16907 v out switching frequency vs. r fosc max16907 toc06 r fosc (k i ) switching frequency (mhz) 21 18 15 0.5 1.0 1.5 2.0 2.5 3.0 0 12 24 v in = 14v i load = 1.5a downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 13 maxim integrated output voltage, and selected lir then determine the inductor value as follows: out sup out sup sw out v( v v) l v f i lir ? = where v sup , v out , and i out are typical values (so that efficiency is optimum for typical conditions). the switching frequency is set by r fosc (see the internal oscillator sec - tion). the exact inductor value is not critical and can be adjusted to make trade-offs among size, cost, efficiency, and transient response requirements. table 1 shows a comparison between small and large inductor sizes.the inductor value must be chosen so that the maximum inductor current does not reach the device?s minimum current limit. the optimum operating point is usually found between 25% and 35% ripple current. when pulse skipping (fsync low and light loads), the inductor value also determines the load-current value at which pfm/ pwm switchover occurs. find a low-loss inductor having the lowest possible dc resistance that fits in the allotted dimensions. most inductor manufacturers provide inductors in standard values, such as 1.0 f h, 1.5 f h, 2.2 f h, 3.3 f h, etc. also look for nonstandard values, which can provide a bet - ter compromise in lir across the input voltage range. if using a swinging inductor (where the no-load inductance decreases linearly with increasing current), evaluate the lir with properly scaled inductance values. for the selected inductance value, the actual peak-to-peak inductor ripple current ( d i inductor ) is defined by: out sup out inductor sup sw v( v v) i v fl ? ?= where d i inductor is in a, l is in h, and f sw is in hz. ferrite cores are often the best choices, although pow - dered iron is inexpensive and can work well at 200khz. the core must be large enough not to saturate at the peak inductor current (i peak ): inductor peak load(max) i ii 2 ? = + input capacitor the input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuit?s switching. the input capacitor rms current requirement (i rms ) is defined by the following equation: out sup out rms load(max) sup v( v v) ii v ? = i rms has a maximum value when the input voltage equals twice the output voltage (v sup = 2v out ), so i rms(max) = i load(max) /2. choose an input capacitor that exhibits less than +10 n c self-heating temperature rise at the rms input current for optimal long-term reliability. the input-voltage ripple is composed of d v q (caused by the capacitor discharge) and d v esr (caused by the equivalent series resistance (esr) of the capacitor). use low-esr ceramic capacitors with high ripple-current capability at the input. assume the contribution from the esr and capacitor discharge equal to 50%. calculate the input capacitance and esr required for a specified input-voltage ripple using the following equations: esr in l out v esr i i 2 ? = ? + where sup out out l sup sw (v v ) v i v fl ? ?= and out in q sw i d(1 d) c vf ? = ? and out supsw v d v = where i out is the maximum output current, and d is the duty cycle. output capacitor the output filter capacitor must have low enough esr to meet output ripple and load-transient requirements, yet have high enough esr to satisfy stability requirements. the output capacitance must be high enough to absorb table 1. inductor size comparison inductor size smaller larger lower price smaller ripple smaller form factor higher efficiency faster load response larger fixed-frequency range in skip mode downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 14 maxim integrated the inductor energy while transitioning from full-load to no-load conditions without tripping the overvoltage fault protection. when using high-capacitance, low-esr capacitors, the filter capacitor?s esr dominates the output-voltage ripple. so the size of the output capaci - tor depends on the maximum esr required to meet the output-voltage ripple (v ripple(p-p) ) specifications: v ripple(p-p) = esr i load(max) lir the actual capacitance value required relates to the physical size needed to achieve low esr, as well as to the chemistry of the capacitor technology. thus, the capacitor is usually selected by esr and voltage rating rather than by capacitance value. when using low-capacity filter capacitors, such as ceramic capacitors, size is usually determined by the capacity needed to prevent voltage droop and volt - age rise from causing problems during load transients. generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising load edge is no longer a problem. however, low-capacity filter capacitors typically have high-esr zeros that can affect the overall stability. rectifier selection the device requires an external schottky diode recti - fier as a freewheeling diode. connect this rectifier close to the device using short leads and short pcb traces. choose a rectifier with a voltage rating greater than the maximum expected input voltage, v supsw . use a low forward-voltage-drop schottky rectifier to limit the nega - tive voltage at lx. avoid higher than necessary reverse- voltage schottky rectifiers that have higher forward- voltage drops. compensation network the device uses an internal transconductance error amplifier with its inverting input and its output available to the user for external frequency compensation. the output capacitor and compensation network determine the loop stability. the inductor and the output capaci - tor are chosen based on performance, size, and cost. additionally, the compensation network optimizes the control-loop stability. the controller uses a current-mode control scheme that regulates the output voltage by forcing the required current through the external inductor. the device uses the volt - age drop across the high-side mosfet to sense inductor current. current-mode control eliminates the double pole in the feedback loop caused by the inductor and output capacitor, resulting in a smaller phase shift and requiring less elaborate error-amplifier compensation than voltage- mode control. only a simple single-series resistor (r c ) and capacitor (c c ) are required to have a stable, high- bandwidth loop in applications where ceramic capacitors are used for output filtering ( figure 3 ). for other types of capacitors, due to the higher capacitance and esr, the frequency of the zero created by the capacitance and esr is lower than the desired closed-loop crossover fre - quency. to stabilize a nonceramic output capacitor loop, add another compensation capacitor (c f ) from comp to gnd to cancel this esr zero.the basic regulator loop is modeled as a power modula - tor, output feedback divider, and an error amplifier. the power modulator has a dc gain set by g mc x r load , with a pole and zero pair set by r load , the output capacitor (c out ), and its esr. the following equations allow to approximate the value for the gain of the power modulator (gain mod(dc) ), neglecting the effect of the ramp stabilization. ramp stabilization is necessary when the duty cycle is above 50% and is internally done for the device. gain mod(dc) = g mc r load where r load = v out /i lout(max) in i , and g mc = 3s. in a current-mode step-down converter, the output capacitor, its esr, and the load resistance introduce a pole at the following frequency: pmod out load 1 f 2c r = figure 3. compensation network r 2 r 1 v ref v out r c c c c f comp g m downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 15 maxim integrated the output capacitor and its esr also introduce a zero at: zmod out 1 f 2 esr c = when c out is composed of ?n? identical capacitors in parallel, the resulting c out = n x c out(each) and esr = esr (each) /n. note that the capacitor zero for a parallel combination of alike capacitors is the same as for an individual capacitor. the feedback voltage-divider has a gain of gain fb = v fb /v out , where v fb is 1v (typ). the transconductance error amplifier has a dc gain of gain ea(dc) = g m,ea x r out,ea , where g m,ea is the error- amplifier transconductance, which is 900 f s (typ), and r out,ea is the output resistance of the error amplifier. a dominant pole (f dpea ) is set by the compensa - tion capacitor (c c ) and the amplifier output resistance (r out,ea ). a zero (f zea ) is set by the compensation resistor (r c ) and the compensation capacitor (c c ). there is an optional pole (f pea ) set by c f and r c to cancel the output capacitor esr zero if it occurs near the crossover frequency (f c , where the loop gain equals 1 (0db)). thus: dpea c o u t ,e a c 1 f 2 c (r r ) = + zea cc 1 f 2c r = pea fc 1 f 2cr = the loop-gain crossover frequency (f c ) should be set below 1/5th of the switching frequency and much higher than the power-modulator pole (f pmod ): sw pmod c f ff 5 << the total loop gain as the product of the modulator gain, the feedback voltage-divider gain, and the error-amplifier gain at f c should be equal to 1. so: fb mod(fc) ea(fc) out v gain gain 1 v = for the case where f zmod is greater than f c : gain ea(fc) = g m,ea r c pmod mod(fc) mod(dc) c f gain gain f = therefore: fb mod(fc) m,ea c out v gain g r 1 v = solving for r c : out c m,ea fb mod(fc) v r g v gain = set the error-amplifier compensation zero formed by r c and c c (f zea ) at the f pmod . calculate the value of c c as follows: c pmod c 1 c 2f r = if f zmod is less than 5 x f c , add a second capacitor, c f , from comp to gnd and set the compensation pole formed by r c and c f (f pea ) at the f zmod . calculate the value of c f as follows: f zmod c 1 c 2f r = as the load current decreases, the modulator pole also decreases; however, the modulator gain increases accord - ingly and the crossover frequency remains the same.for the case where f zmod is less than f c : the power-modulator gain at f c is: pmod mod(fc) mod(dc) zmod f gain gain f = the error-amplifier gain at f c is: zmod ea(fc) m,ea c c f gain g r f = therefore: zmod fb mod(fc) m,ea c out c f v gain g r 1 vf = solving for r c : out c c m,ea fb mod(fc) zmod vf r g v gain f = set the error-amplifier compensation zero formed by r c and c c at the f pmod (f zea = f pmod ) as follows: downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current 16 maxim integrated ordering information /v denotes an automotive qualified part.+ denotes a lead(pb)-free/rohs-compliant package. ** ep = exposed pad. chip information process: bicmos package information for the latest package outline information and land patterns (foot - prints), go to www.maximintegrated.com/packages . note that a ?+?, ?#?, or ?-? in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. c pmod c 1 c 2f r = if f zmod is less than 5 x f c , add a second capacitor c f from comp to gnd. set f pea = f zmod and calculate c f as follows: f zmod c 1 c 2f r = pcb layout guidelines careful pcb layout is critical to achieve low switching losses and clean, stable operation. use a multilayer board whenever possible for better noise immunity and power dissipation. follow these guidelines for good pcb layout: 1) use a large contiguous copper plane under the ic package. ensure that all heat-dissipating components have adequate cooling. the bottom pad of the device must be soldered down to this copper plane for effec - tive heat dissipation and for getting the full power out of the ic. use multiple vias or a single large via in this plane for heat dissipation. 2) isolate the power components and high-current path from the sensitive analog circuitry. this is essential to prevent any noise coupling into the analog signals. 3) keep the high-current paths short, especially at the ground terminals. this practice is essential for stable, jitter-free operation. the high-current path composed of input capacitor, high-side fet, inductor, and output capacitor should be as short as possible. 4) keep the power traces and load connections short. this practice is essential for high efficiency. use thick copper pcbs (2oz vs. 1oz) to enhance full-load efficiency. 5) the analog signal lines should be routed away from the high-frequency planes. this ensures integrity of sensitive signals feeding back into the ic. 6) the ground connection for the analog and power section should be close to the ic. this keeps the ground current loops to a minimum. in cases where only one ground is used, enough isolation between analog return signals and high-power signals must be maintained. part spread specturm temp range pin-package max16907raue/v+ disabled -40 n c to +125 n c 16 tssop-ep** max16907raue+ disabled -40 n c to +125 n c 16 tssop-ep** max16907saue/v+ enabled -40 n c to +125 n c 16 tssop-ep** max16907saue+ enabled -40 n c to +125 n c 16 tssop-ep** max16907rate/v+ disabled -40 n c to +125 n c 16 tqfn-ep** max16907rate+ disabled -40 n c to +125 n c 16 tqfn-ep** max16907sate/v+ enabled -40 n c to +125 n c 16 tqfn-ep** max16907sate+ enabled -40 n c to +125 n c 16 tqfn-ep** package type package code outline no. land pattern no. 16 tssop-ep u16e+3 21-0108 90-0120 16 tqfn-ep t1655+4 21-0140 90-0121 downloaded from: http:///
max16907 36v, 2.2mhz step-down converter with low operating current maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 17 ? 2013 maxim integrated products, inc. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. revision history revision number revision date description pages changed 0 3/11 initial release ? 1 7/11 corrected errors found in the gain mod(dc) and f pmod equations in the compensation network section 14 2 4/13 added spread spectrum section, updated part numbers 12, 16 downloaded from: http:///

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